Anna Kuwana, Jun-ichi Matsuda, Haruo Kobayashi 0001. Optimization of High Reliability and Wide SOA 100 V LDMOS Transistor with Low Specific On-Resistance. In 13th IEEE International Conference on ASIC, ASICON 2019, Chongqing, China, October 29 - November 1, 2019. pages 1-4, IEEE, 2019. [doi]
Abstract is missing.