Jacqueline Lagasse, Christopher Bartoli, Wayne Burleson. Combining Clock and Voltage Noise Countermeasures Against Power Side-Channel Analysis. In 30th IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2019, New York, NY, USA, July 15-17, 2019. pages 214-217, IEEE, 2019. [doi]
Abstract is missing.