Fast, accurate prediction of PLL jitter induced by power grid noise - researchr publication related

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Xiaolue Lai, Jaijeet Roychowdhury. Fast, accurate prediction of PLL jitter induced by power grid noise. In Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, CICC 2004, Orlando, FL, USA, October 2004. pages 121-124, IEEE, 2004. [doi]

The following publications are possibly variants of this publication:

Fast PLL simulation using nonlinear VCO macromodels for accurate prediction of jitter and cycle-slipping due to loop non-idealities and supply noiseXiaolue Lai, Yayun Wan, Jaijeet S. Roychowdhury. aspdac 2005: 459-464 [doi]

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