A CMOS-Based Logic Cell for the Implementation of Self-Checking FPGAs

Parag K. Lala, Anup Singh, Alvernon Walker. A CMOS-Based Logic Cell for the Implementation of Self-Checking FPGAs. In 14th International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 99), November 1-3, 1999, Albuquerque, NM, USA, Proceedings. pages 238-246, IEEE Computer Society, 1999. [doi]

@inproceedings{LalaSW99,
  title = {A CMOS-Based Logic Cell for the Implementation of Self-Checking FPGAs},
  author = {Parag K. Lala and Anup Singh and Alvernon Walker},
  year = {1999},
  url = {http://computer.org/proceedings/dft/0325/03250238abs.htm},
  tags = {rule-based, logic},
  researchr = {https://researchr.org/publication/LalaSW99},
  cites = {0},
  citedby = {0},
  pages = {238-246},
  booktitle = {14th International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT  99), November 1-3, 1999, Albuquerque, NM, USA, Proceedings},
  publisher = {IEEE Computer Society},
  isbn = {0-7695-0325-X},
}