On-Chip Power-Grid Simulation Using Latency Insertion Method

Subramanian N. Lalgudi, Madhavan Swaminathan, Yaron Kretchmer. On-Chip Power-Grid Simulation Using Latency Insertion Method. IEEE Trans. on Circuits and Systems, 55-I(3):914-931, 2008. [doi]

@article{LalgudiSK08,
  title = {On-Chip Power-Grid Simulation Using Latency Insertion Method},
  author = {Subramanian N. Lalgudi and Madhavan Swaminathan and Yaron Kretchmer},
  year = {2008},
  doi = {10.1109/TCSI.2008.918223},
  url = {http://dx.doi.org/10.1109/TCSI.2008.918223},
  researchr = {https://researchr.org/publication/LalgudiSK08},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. on Circuits and Systems},
  volume = {55-I},
  number = {3},
  pages = {914-931},
}