A 2.7pJ/cycle 16MHz SoC with 4.3nW power-off ARM Cortex-M0+ core in 28nm FD-SOI - researchr publication authors

researchr

You are not signed in
Sign in
Sign up

Guenoie Lallement, Fady Abouzeid, Martin Cochet, Jean-Marc Daveau, Philippe Roche, Jean-Luc Autran. A 2.7pJ/cycle 16MHz SoC with 4.3nW power-off ARM Cortex-M0+ core in 28nm FD-SOI. In 43rd IEEE European Solid State Circuits Conference, ESSCIRC 2017, Leuven, Belgium, September 11-14, 2017. pages 153-162, IEEE, 2017. [doi]

This author has not been identified. Look up 'Guenoie Lallement' in GoogleThis author has not been identified. Look up 'Fady Abouzeid' in GoogleThis author has not been identified. Look up 'Martin Cochet' in GoogleThis author has not been identified. Look up 'Jean-Marc Daveau' in GoogleThis author has not been identified. Look up 'Philippe Roche' in GoogleThis author has not been identified. Look up 'Jean-Luc Autran' in Google

runs on WebDSL