VHDL Description and High-Level Synthesis of an ATM Layer Circuit

Walter Lange, Wolfgang Rosenstiel. VHDL Description and High-Level Synthesis of an ATM Layer Circuit. In 25th EUROMICRO 99 Conference, Informatics: Theory and Practice for the New Millenium, 8-10 September 1999, Milan, Italy. pages 1519, IEEE Computer Society, 1999. [doi]

@inproceedings{LangeR99:1,
  title = {VHDL Description and High-Level Synthesis of an ATM Layer Circuit},
  author = {Walter Lange and Wolfgang Rosenstiel},
  year = {1999},
  url = {http://csdl.computer.org/comp/proceedings/euromicro/1999/0321/01/03211519abs.htm},
  researchr = {https://researchr.org/publication/LangeR99%3A1},
  cites = {0},
  citedby = {0},
  pages = {1519},
  booktitle = {25th EUROMICRO  99 Conference, Informatics: Theory and Practice for the New Millenium, 8-10 September 1999, Milan, Italy},
  publisher = {IEEE Computer Society},
  isbn = {0-7695-0321-7},
}