VHDL Description and High-Level Synthesis of an ATM Layer Circuit

Walter Lange, Wolfgang Rosenstiel. VHDL Description and High-Level Synthesis of an ATM Layer Circuit. In 25th EUROMICRO 99 Conference, Informatics: Theory and Practice for the New Millenium, 8-10 September 1999, Milan, Italy. pages 1519, IEEE Computer Society, 1999. [doi]

Abstract

Abstract is missing.