Christophe Layer, Kotb Jabeur, Stephane Gros, Laurent Becker, Pierre Paoli, Fabrice Bernard-Granger, Virgile Javerliac, Bernard Dieny. Low-power hybrid STT/CMOS system-on-chip embedding non-volatile magnetic memory blocks. In IEEE 13th International New Circuits and Systems Conference, NEWCAS 2015, Grenoble, France, June 7-10, 2015. pages 1-4, IEEE, 2015. [doi]
@inproceedings{LayerJGBPBJD15,
title = {Low-power hybrid STT/CMOS system-on-chip embedding non-volatile magnetic memory blocks},
author = {Christophe Layer and Kotb Jabeur and Stephane Gros and Laurent Becker and Pierre Paoli and Fabrice Bernard-Granger and Virgile Javerliac and Bernard Dieny},
year = {2015},
doi = {10.1109/NEWCAS.2015.7181999},
url = {http://dx.doi.org/10.1109/NEWCAS.2015.7181999},
researchr = {https://researchr.org/publication/LayerJGBPBJD15},
cites = {0},
citedby = {0},
pages = {1-4},
booktitle = {IEEE 13th International New Circuits and Systems Conference, NEWCAS 2015, Grenoble, France, June 7-10, 2015},
publisher = {IEEE},
isbn = {978-1-4799-8893-8},
}