Electrical method to localize the high-resistance of nanoscale CoSi2 word-line for OTP memories

Ming-Yi Lee, T. Y. Chang, W.-F. Hsueh, L.-K. Kuo, D.-J. Lin, Y.-H. Chao, U. J. Tzeng, C. Y. Lu. Electrical method to localize the high-resistance of nanoscale CoSi2 word-line for OTP memories. In IEEE International Reliability Physics Symposium, IRPS 2018, Burlingame, CA, USA, March 11-15, 2018. pages 6, IEEE, 2018. [doi]

Authors

Ming-Yi Lee

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T. Y. Chang

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W.-F. Hsueh

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L.-K. Kuo

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D.-J. Lin

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Y.-H. Chao

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U. J. Tzeng

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C. Y. Lu

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