On-Chip Bus Modeling for Power and Performance Estimation

Je-Hoon Lee, Young-Sin Cho, Seok-Man Kim, Kyoung-Rok Cho. On-Chip Bus Modeling for Power and Performance Estimation. In Stamatis Vassiliadis, Mladen Berekovic, Timo D. Hämäläinen, editors, Embedded Computer Systems: Architectures, Modeling, and Simulation, 7th International Workshop, SAMOS 2007, Samos, Greece, July 16-19, 2007, Proceedings. Volume 4599 of Lecture Notes in Computer Science, pages 200-210, Springer, 2007. [doi]

@inproceedings{LeeCKC07:0,
  title = {On-Chip Bus Modeling for Power and Performance Estimation},
  author = {Je-Hoon Lee and Young-Sin Cho and Seok-Man Kim and Kyoung-Rok Cho},
  year = {2007},
  doi = {10.1007/978-3-540-73625-7_22},
  url = {http://dx.doi.org/10.1007/978-3-540-73625-7_22},
  tags = {modeling},
  researchr = {https://researchr.org/publication/LeeCKC07%3A0},
  cites = {0},
  citedby = {0},
  pages = {200-210},
  booktitle = {Embedded Computer Systems: Architectures, Modeling, and Simulation, 7th International Workshop, SAMOS 2007, Samos, Greece, July 16-19, 2007, Proceedings},
  editor = {Stamatis Vassiliadis and Mladen Berekovic and Timo D. Hämäläinen},
  volume = {4599},
  series = {Lecture Notes in Computer Science},
  publisher = {Springer},
  isbn = {978-3-540-73622-6},
}