Jiwon Lee, Hyeonjun Cheon, Ho Sung Lee, Ik-Hyeon Jeon, Joo-Hyung Chae. Design of 16-Kb 6T SRAM Supporting Wide Parallel Data Access for Enhanced Computation Speed. In 21st International SoC Design Conference, ISOCC 2024, Sapporo, Japan, August 19-22, 2024. pages 167-169, IEEE, 2024. [doi]
Abstract is missing.