Seung-Chul Lee, Brian Elies, Yun Chiu. An 85dB SFDR 67dB SNDR 8OSR 240MS/s ΔΣ ADC with nonlinear memory error calibration. In Symposium on VLSI Circuits, VLSIC 2012, Honolulu, HI, USA, June 13-15, 2012. pages 164-165, IEEE, 2012. [doi]
Abstract is missing.