Chang-Kyo Lee, Yoon-Joo Eom, Jin-Hee Park, Junha Lee, Hye-Ran Kim, Kihan Kim, Young Choi, Ho-Jun Chang, Jonghyuk Kim, Jong-Min Bang, Seungjun Shin, Hanna Park, Su-Jin Park, Young-Ryeol Choi, Hoon Lee, Kyong-Ho Jeon, Jae Young Lee, Hyo-Joo Ahn, Kyoung-Ho Kim, Jung Sik Kim, Soobong Chang, Hyong-Ryol Hwang, Duyeul Kim, Yoon-Hwan Yoon, Seok-Hun Hyun, Joon Young Park, Yoon-Gyu Song, Youn-Sik Park, Hyuck-Joon Kwon, Seung-Jun Bae, Tae-young Oh, Indal Song, Yong-Cheol Bae, Jung Hwan Choi, Kwang-Il Park, Seong-Jin Jang, Gyo-Young Jin. 23.2 A 5Gb/s/pin 8Gb LPDDR4X SDRAM with power-isolated LVSTL and split-die architecture with 2-die ZQ calibration scheme. In 2017 IEEE International Solid-State Circuits Conference, ISSCC 2017, San Francisco, CA, USA, February 5-9, 2017. pages 390-391, IEEE, 2017. [doi]
@inproceedings{LeeEPLKKCCKBSPP17,
title = {23.2 A 5Gb/s/pin 8Gb LPDDR4X SDRAM with power-isolated LVSTL and split-die architecture with 2-die ZQ calibration scheme},
author = {Chang-Kyo Lee and Yoon-Joo Eom and Jin-Hee Park and Junha Lee and Hye-Ran Kim and Kihan Kim and Young Choi and Ho-Jun Chang and Jonghyuk Kim and Jong-Min Bang and Seungjun Shin and Hanna Park and Su-Jin Park and Young-Ryeol Choi and Hoon Lee and Kyong-Ho Jeon and Jae Young Lee and Hyo-Joo Ahn and Kyoung-Ho Kim and Jung Sik Kim and Soobong Chang and Hyong-Ryol Hwang and Duyeul Kim and Yoon-Hwan Yoon and Seok-Hun Hyun and Joon Young Park and Yoon-Gyu Song and Youn-Sik Park and Hyuck-Joon Kwon and Seung-Jun Bae and Tae-young Oh and Indal Song and Yong-Cheol Bae and Jung Hwan Choi and Kwang-Il Park and Seong-Jin Jang and Gyo-Young Jin},
year = {2017},
doi = {10.1109/ISSCC.2017.7870425},
url = {http://dx.doi.org/10.1109/ISSCC.2017.7870425},
researchr = {https://researchr.org/publication/LeeEPLKKCCKBSPP17},
cites = {0},
citedby = {0},
pages = {390-391},
booktitle = {2017 IEEE International Solid-State Circuits Conference, ISSCC 2017, San Francisco, CA, USA, February 5-9, 2017},
publisher = {IEEE},
isbn = {978-1-5090-3758-2},
}