Fast shared on-chip memory architecture for efficient hybrid computing with CGRAs

Jongeun Lee, Yeonghun Jeong, Sungsok Seo. Fast shared on-chip memory architecture for efficient hybrid computing with CGRAs. In Enrico Macii, editor, Design, Automation and Test in Europe, DATE 13, Grenoble, France, March 18-22, 2013. pages 1575-1578, EDA Consortium San Jose, CA, USA / ACM DL, 2013. [doi]

Authors

Jongeun Lee

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Yeonghun Jeong

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Sungsok Seo

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