Jongeun Lee, Yeonghun Jeong, Sungsok Seo. Fast shared on-chip memory architecture for efficient hybrid computing with CGRAs. In Enrico Macii, editor, Design, Automation and Test in Europe, DATE 13, Grenoble, France, March 18-22, 2013. pages 1575-1578, EDA Consortium San Jose, CA, USA / ACM DL, 2013. [doi]
@inproceedings{LeeJS13-0,
title = {Fast shared on-chip memory architecture for efficient hybrid computing with CGRAs},
author = {Jongeun Lee and Yeonghun Jeong and Sungsok Seo},
year = {2013},
url = {http://dl.acm.org/citation.cfm?id=2485662},
researchr = {https://researchr.org/publication/LeeJS13-0},
cites = {0},
citedby = {0},
pages = {1575-1578},
booktitle = {Design, Automation and Test in Europe, DATE 13, Grenoble, France, March 18-22, 2013},
editor = {Enrico Macii},
publisher = {EDA Consortium San Jose, CA, USA / ACM DL},
isbn = {978-1-4503-2153-2},
}