DFT architecture for a dynamic fault model of the embedded mask ROM of SOC

Yang-Han Lee, Yih-Guang Jan, Jei-Jung Shen, Shian-Wei Tzeng, Ming-Hsueh Chuang, Jheng-Yao Lin. DFT architecture for a dynamic fault model of the embedded mask ROM of SOC. In 13th IEEE International Workshop on Memory Technology, Design, and Testing (MTDT 2005), 3-5 August 2005, Taipei, Taiwan. pages 78-82, IEEE Computer Society, 2005. [doi]

Abstract

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