Hybrid Assistive Circuit of SRAM for Improving Read and Write Noise Margin in 3nm CMOS - researchr publication

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Jiyoung Lee, Youngmin Kim. Hybrid Assistive Circuit of SRAM for Improving Read and Write Noise Margin in 3nm CMOS. In 19th International SoC Design Conference, ISOCC 2022, Gangneung-si, Republic of Korea, October 19-22, 2022. pages 336-337, IEEE, 2022. [doi]

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