Tae-Ho Lee, Yong Hun Kim, Lee-Sup Kim. A 5-Gb/s Digital Clock and Data Recovery Circuit With Reduced DCO Supply Noise Sensitivity Utilizing Coupling Network. IEEE Trans. VLSI Syst., 25(1):380-384, 2017. [doi]
@article{LeeKK17-0,
title = {A 5-Gb/s Digital Clock and Data Recovery Circuit With Reduced DCO Supply Noise Sensitivity Utilizing Coupling Network},
author = {Tae-Ho Lee and Yong Hun Kim and Lee-Sup Kim},
year = {2017},
doi = {10.1109/TVLSI.2016.2566927},
url = {http://dx.doi.org/10.1109/TVLSI.2016.2566927},
researchr = {https://researchr.org/publication/LeeKK17-0},
cites = {0},
citedby = {0},
journal = {IEEE Trans. VLSI Syst.},
volume = {25},
number = {1},
pages = {380-384},
}