A 5-Gb/s Digital Clock and Data Recovery Circuit With Reduced DCO Supply Noise Sensitivity Utilizing Coupling Network

Tae-Ho Lee, Yong Hun Kim, Lee-Sup Kim. A 5-Gb/s Digital Clock and Data Recovery Circuit With Reduced DCO Supply Noise Sensitivity Utilizing Coupling Network. IEEE Trans. VLSI Syst., 25(1):380-384, 2017. [doi]

Abstract

Abstract is missing.