25.2 A 1.2V 8Gb 8-channel 128GB/s high-bandwidth memory (HBM) stacked DRAM with effective microbump I/O test methods using 29nm process and TSV

Dong Uk Lee, Kyung-whan Kim, Kwan-Weon Kim, Hongjung Kim, Ju-Young Kim, Young-Jun Park, Jae-Hwan Kim, Dae Suk Kim, Heat Bit Park, Jin Wook Shin, Jang-Hwan Cho, Ki Hun Kwon, Min-Jeong Kim, Jaejin Lee, Kunwoo Park, Byong-Tae Chung, Sung-Joo Hong. 25.2 A 1.2V 8Gb 8-channel 128GB/s high-bandwidth memory (HBM) stacked DRAM with effective microbump I/O test methods using 29nm process and TSV. In 2014 IEEE International Conference on Solid-State Circuits Conference, ISSCC 2014, Digest of Technical Papers, San Francisco, CA, USA, February 9-13, 2014. pages 432-433, IEEE, 2014. [doi]

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