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A 1 Gbit synchronous dynamic random access memory with an independent subarray-controlled scheme and a hierarchical decoding scheme

Kyu-Chan Lee, Changhyun Kim, Hongil Yoon, Keum-Yong Kim, Byung-Sik Moon, Sang-Bo Lee, Jung Hwa Lee, Nam-Jong Kim, Soo-In Cho. A 1 Gbit synchronous dynamic random access memory with an independent subarray-controlled scheme and a hierarchical decoding scheme. J. Solid-State Circuits, 33(5):779-786, 1998. [doi]

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