Chun C. Lee, Cho-Ying Lu, Ramya Narayanaswamy, Jad B. Rizk. A 12b 70MS/s SAR ADC with digital startup calibration in 14nm CMOS. In Symposium on VLSI Circuits, VLSIC 2015, Kyoto, Japan, June 17-19, 2015. pages 62, IEEE, 2015. [doi]
Abstract is missing.