An inter-frame/inter-view cache architecture design for multi-view video decoders

Jui-Sheng Lee, Sheng-Han Wang, Chih-Tai Chou, Cheng-An Chien, Hsiu-Cheng Chang, Jiun-In Guo. An inter-frame/inter-view cache architecture design for multi-view video decoders. In Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, APSIPA 2012, Hollywood, CA, USA, December 3-6, 2012. pages 1-4, IEEE, 2012. [doi]

Abstract

Abstract is missing.