A dual-retention time architecture towards secure and high performance STT-RAM main memory subsystem

Taemin Lee, Sungjoo Yoo. A dual-retention time architecture towards secure and high performance STT-RAM main memory subsystem. In International SoC Design Conference, ISOCC 2016, Jeju, South Korea, October 23-26, 2016. pages 313-314, IEEE, 2016. [doi]

Abstract

Abstract is missing.