/TPlace: Machine Learning-Based Delay-Aware Transistor Placement for Standard Cell Synthesis

Tai-Cheng Lee, Cheng-Yen Yang, Yih-Lang Li. /TPlace: Machine Learning-Based Delay-Aware Transistor Placement for Standard Cell Synthesis. In IEEE/ACM International Conference On Computer Aided Design, ICCAD 2020, San Diego, CA, USA, November 2-5, 2020. pages 1-8, IEEE, 2020. [doi]

Abstract

Abstract is missing.