Automated SEU fault emulation using partial FPGA reconfiguration

Uros Legat, Anton Biasizzo, Franc Novak. Automated SEU fault emulation using partial FPGA reconfiguration. In Elena Gramatová, Zdenek Kotásek, Andreas Steininger, Heinrich Theodor Vierhaus, Horst Zimmermann, editors, 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2010, Vienna, Austria, April 14-16, 2010. pages 24-27, IEEE, 2010. [doi]

Abstract

Abstract is missing.