Design and Implementation Fine-grained Power Gating on Microprocessor Functional Units

Zhao Lei, Daisuke Ikebuchi, Kimiyoshi Usami, Mitaro Namiki, Masaaki Kondo, Hiroshi Nakamura, Hideharu Amano. Design and Implementation Fine-grained Power Gating on Microprocessor Functional Units. IPSJ T. on System LSI Design Methodology, 4:182-192, 2011. [doi]

Authors

Zhao Lei

This author has not been identified. Look up 'Zhao Lei' in Google

Daisuke Ikebuchi

This author has not been identified. Look up 'Daisuke Ikebuchi' in Google

Kimiyoshi Usami

This author has not been identified. Look up 'Kimiyoshi Usami' in Google

Mitaro Namiki

This author has not been identified. Look up 'Mitaro Namiki' in Google

Masaaki Kondo

This author has not been identified. Look up 'Masaaki Kondo' in Google

Hiroshi Nakamura

This author has not been identified. Look up 'Hiroshi Nakamura' in Google

Hideharu Amano

This author has not been identified. Look up 'Hideharu Amano' in Google