Ashwin Sanjay Lele, Srivatsava Jandhyala, Saurabh Gangurde, Virendra Singh, Sreenivas Subramoney, Udayan Ganguly. Disrupting Low-Write-Energy vs. Fast-Read Dilemma in RRAM to Enable L1 Instruction Cache. In Ambika Prasad Shah, Sudeb Dasgupta, Anand D. Darji, Jaynarayan T. Tudu, editors, VLSI Design and Test - 26th International Symposium, VDAT 2022, Jammu, India, July 17-19, 2022, Revised Selected Papers. Volume 1687 of Communications in Computer and Information Science, pages 499-512, Springer, 2022. [doi]
Abstract is missing.