Tun Li, Yang Guo, Gongjie Liu, Sikun Li. Functional Vectors Generation for RT-Level Verilog Descriptions Based on Path Enumeration and Constraint Logic Programming. In Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August - 3 September 2005, Porto, Portugal. pages 17-25, IEEE Computer Society, 2005. [doi]
@inproceedings{LiGLL05:0,
title = {Functional Vectors Generation for RT-Level Verilog Descriptions Based on Path Enumeration and Constraint Logic Programming},
author = {Tun Li and Yang Guo and Gongjie Liu and Sikun Li},
year = {2005},
doi = {10.1109/DSD.2005.43},
url = {http://doi.ieeecomputersociety.org/10.1109/DSD.2005.43},
tags = {functional programming, constraints, logic programming, programming, logic},
researchr = {https://researchr.org/publication/LiGLL05%3A0},
cites = {0},
citedby = {0},
pages = {17-25},
booktitle = {Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August - 3 September 2005, Porto, Portugal},
publisher = {IEEE Computer Society},
isbn = {0-7695-2433-8},
}