A Hierarchical Test Scheme for System-On-Chip Designs

Jin-Fu Li, Hsin-Jung Huang, Jeng-Bin Chen, Chih-Pin Su, Cheng-Wen Wu, Chuang Cheng, Shao-I Chen, Chi-Yi Hwang, Hsiao-Ping Lin. A Hierarchical Test Scheme for System-On-Chip Designs. In 2002 Design, Automation and Test in Europe Conference and Exposition (DATE 2002), 4-8 March 2002, Paris, France. pages 486-490, IEEE Computer Society, 2002. [doi]

Authors

Jin-Fu Li

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Hsin-Jung Huang

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Jeng-Bin Chen

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Chih-Pin Su

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Cheng-Wen Wu

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Chuang Cheng

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Shao-I Chen

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Chi-Yi Hwang

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Hsiao-Ping Lin

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