A 4.2pJ/Pixel 480 fps Stereo Vision Processor with Pixel Level Pipelined Architecture and Two-Path Aggregation Semi-Global Matching

Zehao Li, Yuncheng Lu, Anh-Tuan Do, Tony Tae-Hyoung Kim. A 4.2pJ/Pixel 480 fps Stereo Vision Processor with Pixel Level Pipelined Architecture and Two-Path Aggregation Semi-Global Matching. In CICC. pages 1-2, 2024. [doi]

Abstract

Abstract is missing.