VLSI implementation of high-speed low power decimation filter for LTE sigma-delta A/D converter application

Jing Li, Ran Li, Ting Yi, Zhiliang Hong, Bill Yang Liu. VLSI implementation of high-speed low power decimation filter for LTE sigma-delta A/D converter application. In 2011 IEEE 9th International Conference on ASIC, ASICON 2011, Xiamen, China, October 25-28, 2011. pages 453-456, IEEE, 2011. [doi]

Authors

Jing Li

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Ran Li

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Ting Yi

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Zhiliang Hong

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Bill Yang Liu

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