Jing Li, Ran Li, Ting Yi, Zhiliang Hong, Bill Yang Liu. VLSI implementation of high-speed low power decimation filter for LTE sigma-delta A/D converter application. In 2011 IEEE 9th International Conference on ASIC, ASICON 2011, Xiamen, China, October 25-28, 2011. pages 453-456, IEEE, 2011. [doi]
@inproceedings{LiLYHL11,
title = {VLSI implementation of high-speed low power decimation filter for LTE sigma-delta A/D converter application},
author = {Jing Li and Ran Li and Ting Yi and Zhiliang Hong and Bill Yang Liu},
year = {2011},
doi = {10.1109/ASICON.2011.6157219},
url = {http://dx.doi.org/10.1109/ASICON.2011.6157219},
researchr = {https://researchr.org/publication/LiLYHL11},
cites = {0},
citedby = {0},
pages = {453-456},
booktitle = {2011 IEEE 9th International Conference on ASIC, ASICON 2011, Xiamen, China, October 25-28, 2011},
publisher = {IEEE},
isbn = {978-1-61284-192-2},
}