A 1.8-V 67mW 10-bit 100MSPS pipelined ADC using time-shifted CDS technique

Jipeng Li, Un-Ku Moon. A 1.8-V 67mW 10-bit 100MSPS pipelined ADC using time-shifted CDS technique. In Proceedings of the IEEE Custom Integrated Circuits Conference, CICC 2003, San Jose, CA, USA, September 21 - 24, 2003. pages 413-416, IEEE, 2003. [doi]

@inproceedings{LiM03-10,
  title = {A 1.8-V 67mW 10-bit 100MSPS pipelined ADC using time-shifted CDS technique},
  author = {Jipeng Li and Un-Ku Moon},
  year = {2003},
  doi = {10.1109/CICC.2003.1249430},
  url = {https://doi.org/10.1109/CICC.2003.1249430},
  researchr = {https://researchr.org/publication/LiM03-10},
  cites = {0},
  citedby = {0},
  pages = {413-416},
  booktitle = {Proceedings of the IEEE Custom Integrated Circuits Conference, CICC 2003, San Jose, CA, USA, September 21 - 24, 2003},
  publisher = {IEEE},
  isbn = {0-7803-7842-3},
}