A 1.8-V 67mW 10-bit 100MSPS pipelined ADC using time-shifted CDS technique

Jipeng Li, Un-Ku Moon. A 1.8-V 67mW 10-bit 100MSPS pipelined ADC using time-shifted CDS technique. In Proceedings of the IEEE Custom Integrated Circuits Conference, CICC 2003, San Jose, CA, USA, September 21 - 24, 2003. pages 413-416, IEEE, 2003. [doi]

Abstract

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