A 1.8-V 67-mW 10-bit 100-MS/s pipelined ADC using time-shifted CDS technique

Jipeng Li, Un-Ku Moon. A 1.8-V 67-mW 10-bit 100-MS/s pipelined ADC using time-shifted CDS technique. J. Solid-State Circuits, 39(9):1468-1476, 2004. [doi]

Abstract

Abstract is missing.