Post-placement Thermal Via Planning for 3D Integrated Circuit

Jing Li, Hiroshi Miyashita. Post-placement Thermal Via Planning for 3D Integrated Circuit. In IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006. pages 808-811, IEEE, 2006. [doi]

Abstract

Abstract is missing.