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Virtual Two-Port Memory Architecture for Asymmetric Memory Technologies

Jiayin Li, Kartik Mohanram. Virtual Two-Port Memory Architecture for Asymmetric Memory Technologies. In 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, VLSID 2017, Hyderabad, India, January 7-11, 2017. pages 47-52, IEEE Computer Society, 2017. [doi]

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