Chaofan Li, Sachin S. Sapatnekar, Jiang Hu. Fast Mapping-Based High-Level Synthesis of Pipelined Circuits. In 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019. pages 33-38, IEEE, 2019. [doi]
Abstract is missing.