Zhengjie Li, Yuanlong Xiao, Yufan Zhang, Yunbing Pang, Chengyu Hu, Jian Wang, Jinmei Lai. An Automatic Transistor-Level Tool for GRM FPGA Interconnect Circuits Optimization. In Houman Homayoun, Baris Taskin, Tinoosh Mohsenin, Weisheng Zhao, editors, Proceedings of the 2019 on Great Lakes Symposium on VLSI, GLSVLSI 2019, Tysons Corner, VA, USA, May 9-11, 2019. pages 93-98, ACM, 2019. [doi]
Abstract is missing.