Yunbing Pang - researchr alias

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Viewing Publication 1 - 5 from 5

2019

An Automatic Transistor-Level Tool for GRM FPGA Interconnect Circuits OptimizationZhengjie Li, Yuanlong Xiao, Yufan Zhang, Yunbing Pang, Chengyu Hu, Jian Wang, Jinmei Lai. glvlsi 2019: 93-98 [doi]

Transistor-Level Optimization Methodology for GRM FPGA Interconnect CircuitsZhengjie Li, Yuanlong Xiao, Yufan Zhang, Yunbing Pang, Jian Wang, Jinmei Lai. fpga 2019: 121 [doi]

A Low-delay Configurable Register for FPGAZhi-Yin Lu, Jia-Feng Liu, Yunbing Pang, Zheug-Jie Li, Yufan Zhang, Jin-mei Lai, Jian Wang. asicon 2019: 1-4 [doi]

Research on Area Modeling Methodology for FPGA Interconnect CircuitsYunbing Pang, Jiqing Xu, Zhiyin Lu, Zhengjie Li, Yufan Zhang, Jinmei Lai. asicon 2019: 1-4 [doi]

Research on the impact of different benchmark circuits on the representative path in FPGAsJiqing Xu, Zhengjie Li, Yunbing Pang, Jian Wang, Gang Qu, Jinmei Lai. asicon 2019: 1-3 [doi]

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