Transistor-Level Optimization Methodology for GRM FPGA Interconnect Circuits

Zhengjie Li, Yuanlong Xiao, Yufan Zhang, Yunbing Pang, Jian Wang, Jinmei Lai. Transistor-Level Optimization Methodology for GRM FPGA Interconnect Circuits. In Kia Bazargan, Stephen Neuendorffer, editors, Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA 2019, Seaside, CA, USA, February 24-26, 2019. pages 121, ACM, 2019. [doi]

Abstract

Abstract is missing.