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Zhan-Hui Li, Tao-Tao Zhu, Zhi-Jian Chen, Jian-yi Meng, Xiao-Yan Xiang, Xiao-lang Yan. Eliminating Timing Errors Through Collaborative Design to Maximize the Throughput. IEEE Trans. VLSI Syst., 25(2):670-682, 2017. [doi]
Abstract is missing.