An Efficient Hardware Design for Accelerating Sparse CNNs With NAS-Based Models

Yun Liang 0001, Liqiang Lu, Yicheng Jin, JiaMing Xie, Ruirui Huang, Jiansong Zhang, Wei Lin. An Efficient Hardware Design for Accelerating Sparse CNNs With NAS-Based Models. IEEE Trans. on CAD of Integrated Circuits and Systems, 41(3):597-613, 2022. [doi]

Abstract

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