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Yong Lim, Michael P. Flynn. A 100 MS/s, 10.5 Bit, 2.46 mW Comparator-Less Pipeline ADC Using Self-Biased Ring Amplifiers. J. Solid-State Circuits, 50(10):2331-2341, 2015. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: 11.5 A 100MS/s 10.5b 2.46mW comparator-less pipeline ADC using self-biased ring amplifiersYong Lim, Michael P. Flynn. isscc 2014: 202-203 [doi] A 1 mW 71.5 dB SNDR 50 MS/s 13 bit Fully Differential Ring Amplifier Based SAR-Assisted Pipeline ADCYong Lim, Michael P. Flynn. jssc, 50(12):2901-2911, 2015. [doi]
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