An Analog Model Template Library: Simplifying Chip-Level, Mixed-Signal Design Verification

ByongChan Lim, Mark Horowitz. An Analog Model Template Library: Simplifying Chip-Level, Mixed-Signal Design Verification. IEEE Trans. VLSI Syst., 27(1):193-204, 2019. [doi]

Authors

ByongChan Lim

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Mark Horowitz

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