Design-for-Test Circuit for the Reduced Code Based Linearity Test Method in Pipelined ADCs with Digital Error Correction Technique - researchr publication authors

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Jin-Fu Lin, Soon-Jyh Chang, Chih-Hao Huang. Design-for-Test Circuit for the Reduced Code Based Linearity Test Method in Pipelined ADCs with Digital Error Correction Technique. In Proceedings of the Eighteentgh Asian Test Symposium, ATS 2009, 23-26 November 2009, Taichung, Taiwan. pages 57-62, IEEE Computer Society, 2009. [doi]

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