The following publications are possibly variants of this publication:
- A 9-Bit 150-MS/s Subrange ADC Based on SAR Architecture in 90-nm CMOSYing-Zu Lin, Chun-Cheng Liu, Guan-Ying Huang, Ya-Ting Shyu, Yen-Ting Liu, Soon-Jyh Chang. tcas, 60-I(3):570-581, 2013. [doi]
- A 1-GS/s 11-Bit SAR-Assisted Pipeline ADC With 59-dB SNDR in 65-nm CMOSQing Liu 0005, Wei Shu, Joseph S. Chang. tcas, 65-II(9):1164-1168, 2018. [doi]
- A 11-bit 35-MS/s wide input range SAR ADC in 180-nm CMOS processWen-Chia Luo, Soon-Jyh Chang, Chun-Po Huang, Hao-Sheng Wu. vlsi-dat 2018: 1-4 [doi]