Abstract is missing.
- Future direction of power management in mobile devicesYoum Huh. 1-4 [doi]
- Challenge of low voltage and low power IC toward sustainable futureToshiaki Masuhara. 5-8 [doi]
- An 18ms-latency wireless high quality codec SoC for full HD streamingPilsoon Choi, Yongseok Yi, Kilsik Ha, Yun-Gu Lee, Chil-Youl Hacky Yang, Seyoung Shin, Byung-Ho Ahn, Sung Chul Park, Hyun-Tae Gil, Scott Seongwook Lee, Joongsuk Park, Jaemoon Jo. 9-12 [doi]
- The Second Generation Intel® Core™: A highly integrated high performance multi IA-core and processor graphics chipMarcelo Yuffe, Omer Vikinski, Ziv Shmuely, Ernest Knoll, Tsvika Kurts. 13-16 [doi]
- A dynamic SIMD/MIMD mode switching processor for embedded real-time image recognition systemsShouhei Nomoto, Shorin Kyo, Shin'ichiro Okazaki. 17-20 [doi]
- 0.8V start-up 92% efficiency on-chip boost DC-DC converters for battery operation micro-computersYasunobu Nakase, Shinichi Hirose, Toru Goda, Kehui Hu, Hiroshi Onoda, Yasuhiro Ido, Hiroyuki Kondo, Wei Kong, Wei Zhang, Tsukasa Oishi, Shintaro Mori, Toru Shimizu. 21-24 [doi]
- On overcoming the limitations of single-ended signaling for graphics memory interfacesAmir Amirkhany, Wendemagegnehu T. Beyene, Chris J. Madden, Aliazam Abbasfar, Dave Secker, Dan Oh, Mohammad Hekmat, Ralf Schmitt, Chuck Yuan. 25-28 [doi]
- Digitally-assisted analog circuits for a 10 Gbps, 395 fJ/b optical receiver in 40 nm CMOSPhilip Amberg, Frankie Liu, Michael Dayringer, Jon K. Lexau, Dinesh Patil, Jonathan Gainsley, Hesam Fathi Moghadam, Elad Alon, Xuezhe Zheng, John E. Cunningham, Ashok V. Krishnamoorthy, Ron Ho. 29-32 [doi]
- A 80-mV input, fast startup dual-mode boost converter with charge-pumped pulse generator for energy harvestingPo-Hung Chen, Koichi Ishida, Xin Zhang, Yasuyuki Okuma, Yoshikatsu Ryu, Makoto Takamiya, Takayasu Sakurai. 33-36 [doi]
- A 1.39-V input fast-transient-response digital LDO composed of low-voltage MOS transistors in 40-nm CMOS processMasafumi Onouchi, Kazuo Otsuga, Yasuto Igarashi, Toyohito Ikeya, Sadayuki Morita, Koichiro Ishibashi, Kazumasa Yanagisawa. 37-40 [doi]
- A high stability DC-DC Boost Converter with Ripple Current Control and capacitor-free LDOs for AMOLED displaySe-Won Wang, Young-Jin Woo, Sung-Ho Bae, Tae-Hwang Kong, Gyu-Ha Cho, Gyu-Hyeong Cho. 41-44 [doi]
- An asynchronous digitally-controlled switching converter with adaptive resolution and dynamic power saving to achieve higher than 93.5% efficiency between 5mA and 250mA loadPo-Hsiang Lan, Tsung-Ju Yang, Po-Chiun Huang. 45-48 [doi]
- A MOS current-mode boost DC-DC converter with the duty-ratio-independent frequency characteristicsYuya Hirano, Yasuhiro Sugimoto. 49-52 [doi]
- 2 switching buck regulator using AOT controlChun-Sheng Huang, Chen-Yu Wang, Jia-Hui Wang, Chien-Hung Tsai. 53-56 [doi]
- A 35 fJ 10b 160 MS/s pipelined-SAR ADC with decoupled flip-around MDAC and self-embedded offset cancellationYan Zhu 0001, Chi-Hang Chan, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins, Franco Maloberti. 61-64 [doi]
- A 10b Ternary SAR ADC with decision time quantization based redundancyJon Guerber, Manideep Gande, Hariprasath Venkatram, Allen Waters, Un-Ku Moon. 65-68 [doi]
- A 0.9-V 11-bit 25-MS/s binary-search SAR ADC in 90-nm CMOSYing-Zu Lin, Soon-Jyh Chang, Ya-Ting Shyu, Guan-Ying Huang, Chun-Cheng Liu. 69-72 [doi]
- A 4.8-bit ENOB 5-bit 500MS/s binary-search ADC with minimized number of comparatorsSi-Seng Wong, U. Fat Chio, Chi-Hang Chan, Hou-Lon Choi, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins. 73-76 [doi]
- Digital-domain calibration of split-capacitor DAC with no extra calibration DAC for a differential-type SAR ADCJi-Yong Um, Jae-Hwan Kim, Jae-Yoon Sim, Hong June Park. 77-80 [doi]
- A low power W-band PLL with 17-mW in 65-nm CMOS technologyTao-Yao Chang, Chao-Shiun Wang, Chorng-Kuang Wang. 81-84 [doi]
- A 20GHz ILFD with locking range of 31% for divide-by-4 and 15% for divide-by-8 using progressive mixingAhmed Musa, Kenichi Okada, Akira Matsuzawa. 85-88 [doi]
- An 85-GHz injection-locked frequency divider with current-reuse pre-amplifier techniqueShu-Wei Chu, Chorng-Kuang Wang. 89-92 [doi]
- 3.6mW D-band divide-by-3 injection-locked frequency dividers in 65nm CMOSI-Ting Lee, Chiao-Hsing Wang, Shen-Iuan Liu. 93-96 [doi]
- A 0.13-μm HBT divide-by-6 injection-locked frequency dividerLei Wang, Yong-Zhong Xiong, Sanming Hu, Teck-Guan Lim. 97-100 [doi]
- A 1.22/6.7 ppm/°C VCO with frequency-drifting compensator in 60 nm CMOSLan-chou Cho, Hsiang-Hui Chang, Augusto Marques, Albert Yang, Chinq-Shiun Chiu, Guang-Kaai Dehng. 101-104 [doi]
- A 1.8V 11μW CMOS smart humidity sensor for RFID sensing applicationsZhichao Tan, Roel Daamen, Aurelie Humbert, Kamran Souri, Youngcheol Chae, Youri V. Ponomarev, Michiel A. P. Pertijs. 105-108 [doi]
- A 0.6V to 1.6V, 46μW voltage and temperature independent 48 MHz pulsed LC oscillator for RFID tagsValentijn De Smedt, Georges G. E. Gielen, Wim Dehaene. 109-112 [doi]
- A 190mV supply, 10MHz, 90nm CMOS, pipelined sub-threshold adder using variation-resilient circuit techniquesNele Reynders, Wim Dehaene. 113-116 [doi]
- Design and demonstration of micro-electro-mechanical relay multipliersHossein Fariborzi, Fred Chen, Rhesa Nathanael, Jaeseok Jeon. 117-120 [doi]
- Piezoresistive 6-MNA coated microcantilevers with signal conditioning circuits for electronic noseNeena A. Gilda, Sheetal Patil, V. Seena, Sanjay Joshi, Viral Thaker, Sanket Thakur, Amaravati Anvesha, Maryam Shojaei Baghini, Dinesh Kumar Sharma, V. Ramgopal Rao. 121-124 [doi]
- Medical electronics - A challenging research and industry frontierPeter (Chung-Yu) Wu. 125-128 [doi]
- Bio-inspired semiconductors for early detection and therapyChris Toumazou, Pantelis Georgiou. 129-132 [doi]
- Extending HyperTransport™ technology to 8.0 Gb/s in 32-nm SOI-CMOS processorsBruce Andrew Doyle, Alvin Leng Sun Loke, Sanjeev K. Maheshwari, Charles Lin Wang, Dennis Michael Fischette, Jeffrey G. Cooper, Sanjeev K. Aggarwal, Tin Tin Wee, Chad O. Lackey, Harishkumar S. Kedarnath, Michael M. Oshima, Gerry R. Talbot, Emerson S. Fang. 133-136 [doi]
- A leakage-current-recycling phase-locked loop in 65nm CMOS technologyI-Ting Lee, Yun-Ta Tsai, Shen-Iuan Liu. 137-140 [doi]
- A 2.1-GHz PLL with -80dBc/-74dBc reference spur based on aperture-phase detector and phase-to-analog converterDeyun Cai, Haipeng Fu, Junyan Ren, Wei Li 0038, Ning Li, Hao Yu, Kiat Seng Yeo. 141-144 [doi]
- A 0.6V noise rejectable all-digital CDR with free running TDC for a pulse-based inductive-coupling interfaceWon-Joo Yun, Hiroki Ishikuro, Tadahiro Kuroda. 145-148 [doi]
- Injection-locked clock receiver for monolithic optical link in 45nm SOIJonathan Leu, Vladimir Stojanovic. 149-152 [doi]
- A 900 Mbps single-channel capacitive I/O link for wireless wafer-level testing of integrated circuitsDae-Young Lee, David D. Wentzloff, John P. Hayes. 153-156 [doi]
- A low-power small-area open loop digital DLL for 2.2Gb/s/pin 2Gb DDR3 SDRAMJong Chern Lee, Sin-Hyun Jin, Dae Suk Kim, Young Jun Ku, Chul Kim, Byung-Kwon Park, Hong-Gyeom Kim, Seong-Jun Ahn, Jaejin Lee, Sung-Joo Hong. 157-160 [doi]
- A trimless, 0.5V-1.0V wide voltage operation, high density SRAM macro utilizing dynamic cell stability monitor and multiple memory cell accessKeiichi Kushida, Osamu Hirabayashi, Fumihiko Tachibana, Hiroyuki Hara, Atsushi Kawasumi, Azuma Suzuki, Yasuhisa Takeyama, Yuki Fujimura, Yusuke Niki, Miyako Shizuno, Shinichi Sasaki, Tomoaki Yabe. 161-164 [doi]
- Energy efficiency degradation caused by random variation in low-voltage SRAM and 26% energy reduction by Bitline Amplitude Limiting (BAL) schemeAtsushi Kawasumi, Toshikazu Suzuki, Shinichi Moriwaki, Shinji Miyano. 165-168 [doi]
- High-voltage wordline generator for low-power program operation in NAND flash memoriesSamkyu Won, Yujong Noh, Hyunchul Cho, Jeil Ryu, Sungwook Choi, Sungdae Choi, DuckJu Kim, Junseop Chung, Bong-Seok Han, Eui-Young Chung. 169-172 [doi]
- Low power cross-point memory architectureBruce L. Bateman, Chang Hua Siau, Christophe J. Chevallier. 173-176 [doi]
- 1W 3.3V-to-16.3V boosting wireless power transfer circuits with vector summing power controllerKazutoshi Tomita, Ryota Shinoda, Tadahiro Kuroda, Hiroki Ishikuro. 177-180 [doi]
- A low energy crystal-less double-FSK transceiver for wireless body-area-networkJoonsung Bae, Kiseok Song, Hyungwoo Lee, Hyunwoo Cho, Hoi-Jun Yoo. 181-184 [doi]
- An omnidirectional wireless power receiving IC with 93.6% efficiency CMOS rectifier and Skipping Booster for implantable bio-microsystemsTianjia Sun, Xiang Xie, Guolin Li, Yingke Gu, Xiaomeng Li, Zhihua Wang. 185-188 [doi]
- A 0.67mW 14.55Mbps OFDM-based sensor node transmitter for body channel communicationsTsan-Wen Chen, Ping-Yuan Tsai, Jui-Yuan Yu, Chen-Yi Lee. 189-192 [doi]
- A 0.8V 64×64 CMOS imager with integrated sense-and-stimulus pixel for artificial retina applicationsChin-Lin Lee, Chih-Cheng Hsieh. 193-196 [doi]
- A programmable muscle stimulator based on dual-slope charge balanceJason Yi Jun Tan, Xu Liu, Keng Hoong Wee, Shih-Cheng Yen, Yong Ping Xu. 197-200 [doi]
- An on-chip timing jitter measurement circuit using a self-referenced clock and a cascaded time difference amplifier with duty-cycle compensationKiichi Niitsu, Masato Sakurai, Naohiro Harigai, Takahiro J. Yamaguchi, Haruo Kobayashi. 201-204 [doi]
- Rotary coding for power reduction and S/N improvement in inductive-coupling data communicationAndrzej Radecki, Noriyuki Miura, Hiroki Ishikuro, T. Kuroda. 205-208 [doi]
- Correlations between well potential and SEUs measured by well-potential perturbation detectors in 65nmJun Furuta, Ryosuke Yamamoto, Kazutoshi Kobayashi, Hidetoshi Onodera. 209-212 [doi]
- A 1pJ/cycle Processing Engine in LDPC application with charge recovery logicYimeng Zhang, Mengshu Huang, Nan Wang, Satoshi Goto, Tsutomu Yoshihara. 213-216 [doi]
- An area effective forward/reverse body bias generator for within-die variability compensationNorihiro Kamae, Akira Tsuchiya, Hidetoshi Onodera. 217-220 [doi]
- A 106dB PSRR direct battery connected reconfigurable class-AB/D speaker amplifier for hands-free/receiver 2-in-1 loudspeakerKuo-Hsin Chen, Yen-Shun Hsu. 221-224 [doi]
- A CMOS broadband precise programmable gain amplifier with bandwidth extension techniqueNan Lin, Fei Fang, Zhiliang Hong, Hao Fang. 225-228 [doi]
- An efficient and stable power management circuit with high output energy for wireless powering capsule endoscopyLiang Feng, Yu Mao, Yuhua Cheng. 229-232 [doi]
- A reconfigurable low-noise dynamic comparator with offset calibration in 90nm CMOSChi-Hang Chan, Yan Zhu 0001, U. Fat Chio, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins. 233-236 [doi]
- A 18.9-nA standby current comparator with adaptive bias current generatorKosuke Isono, Tetsuya Hirose, Keishi Tsubaki, Nobutaka Kuroki, Masahiro Numa. 237-240 [doi]
- A 21-bit read-out IC employing dynamic element matching with 0.037% gain errorRong Wu, Johan H. Huijsing, Kofi A. A. Makinwa. 241-244 [doi]
- A continuous-time ΣΔ modulator with a Gm-C input stage, 120-dB CMRR and -87 dB THDNavid Sarhangnejad, Rong Wu, Youngcheol Chae, Kofi A. A. Makinwa. 245-248 [doi]
- A 40MHz 12bit 84.2dB-SFDR continuous-time delta-sigma modulator in 90nm CMOSXinpeng Xing, Maarten De Bock, Pieter Rombouts, Georges G. E. Gielen. 249-252 [doi]
- 2 double-sampling single-OTA 2nd-order ΔΣ modulator in 0.18-μm CMOS technologyKei-Tee Tiew, Minkyu Je. 253-256 [doi]
- A 102dB dynamic range audio sigma-delta modulator in 40nm CMOSTien-Yu Lo. 257-260 [doi]
- A 75.1dB SNDR, 80.2dB DR, 4th-order feed-forward continuous-time sigma-delta modulator with hybrid integrator for silicon TV-tuner applicationChen-Yen Ho, Zwei-Mei Lee, Mu-Chen Huang, Sheng-Jui Huang. 261-264 [doi]
- A 4MHz BW 69dB SNDR continuous-time delta-sigma modulator with reduced sensitivity to clock jitterYu-Cheng Chang, Wei-Hao Chiu, Chen-Chien Lin, Tsung-Hsien Lin. 265-268 [doi]
- A 434GHz SiGe BiCMOS transmitter with an on-chip SIW slot antennaSanming Hu, Lei Wang, Yong-Zhong Xiong, Bo Zhang, Teck-Guan Lim. 269-272 [doi]
- A 12-element 60GHz CMOS phased array transmitter on LTCC package with integrated antennasAjay Balankutty, Stefano Pellerano, Telesphor Kamgaing, Kranti Tantwai, Yorgos Palaskas. 273-276 [doi]
- A 2-GHz digital I/Q modulator in 65-nm CMOSMorteza S. Alavi, Akshay Visweswaran, Robert B. Staszewski, Leo C. N. de Vreede, John R. Long, Atef Akhnoukh. 277-280 [doi]
- A 15-mW 2.4-GHz IEEE 802.15.4 transmitter with a FIR-embedded phase modulatorYao-Hong Liu, Hao-Hung Lo, Li-Guang Chen, Tsung-Hsien Lin. 281-284 [doi]
- An impedance modulated class-E polar amplifier in 90 nm CMOSMark Ingels, Vincenzo Chironi, Björn Debaillie, Andrea Baschirotto, Jan Craninckx. 285-288 [doi]
- A 3.4-mW 54.24-Mbps burst-mode injection-locked CMOS FSK transmitterZhiming Chen, Kuang-Wei Cheng, Yuanjin Zheng, Minkyu Je. 289-292 [doi]
- A 7Gb/s SC-FDE/OFDM MMSE equalizer for 60GHz wireless communicationsFrank Hsiao, Adrian Tang 0002, Derek Yang, Mike Pham, Mau-Chung Frank Chang. 293-296 [doi]
- A 7-bit 1.5-GS/s time-interleaved SAR ADC with dynamic track-and-hold amplifierIppei Akita, Masanori Furuta, Junya Matsuno, Tetsuro Itakura. 293-296 [doi]
- A 772Mbit/s 8.81bit/nJ 90nm CMOS soft-input soft-output sphere decoderFilippo Borlenghi, Ernst Martin Witte, Gerd Ascheid, Heinrich Meyr, Andreas Peter Burg. 297-300 [doi]
- A micropower biomedical signal processor for mobile healthcare applicationsShu-Yu Hsu, Yao-Lin Chen, Po-Yao Chang, Jui-Yuan Yu, Ten-Fang Yang, Ray-Jade Chen, Chen-Yi Lee. 301-304 [doi]
- A 22-Gb/s and over-33-mega-frame/s throughput bridge-function unit in a low-latency OLT LSI for the coexistence of 10G-EPON and GE-PONShoko Ohteru, Tomoaki Kawamura, Hiroki Suto, Masami Urano, Mamoru Nakanishi, Tsugumichi Shibata. 305-308 [doi]
- A 684Mbps 57mW joint QR decomposition and MIMO processor for 4×4 MIMO-OFDM systemsPo-Lin Chiu, Lin-Zheng Huang, Li-Wei Chai, Chun-Fu Liao, Yuan-Hao Huang. 309-312 [doi]
- A 6.6pJ/bit/iter radix-16 modified log-MAP decoder using two-stage ACS architectureKai-Ting Shr, Yu-Cheng Chang, Chu-Yi Lin, Yuan-Hao Huang. 313-316 [doi]
- A 115mW 1Gbps QC-LDPC decoder ASIC for WiMAX in 65nm CMOSXiao Peng, Zhixiang Chen, Xiongxin Zhao, Dajiang Zhou, Satoshi Goto. 317-320 [doi]
- A low power time-of-arrival ranging front end based on a 8-channel 2.2mW, 53ps single-shot-precision Time-to-Digital converterTom Redant, Frederic Stubbe, Wim Dehaene. 321-324 [doi]
- A high-gain wide-input-range time amplifier with an open-loop architecture and a gain equal to current bias ratioHye-Jung Kwon, Jae-Seung Lee, Jae-Yoon Sim, Hong June Park. 325-328 [doi]
- On-the-fly dynamic voltage scaling (DVS) in 65nm energy-efficient power management with frequency-based control (FBC) for SoC systemYu-Huei Lee, Chao-Chang Chiu, Ke-Horng Chen, Ying-Hsi Lin, Chen-Chih Huang. 329-332 [doi]
- A 0.2-0.6 V ring oscillator design using bootstrap techniqueYingchieh Ho, Yu-Sheng Yang, Chauchin Su. 333-336 [doi]
- A 0.8V, sub-mW, varactor-tuning ring-oscillator-based clock generator in 32nm CMOSJenlung Liu, Sehyung Jeon, Tae-Kwang Jang, Dohyung Kim, Jihyun F. Kim, Jaejin Park, Hojin Park. 337-340 [doi]
- Line inversion-based mobile TFT-LCD driver IC with accurate quadruple-gamma-curve correctionJae-Hyuck Woo, Jae-Goo Lee, In-suk Kim, Young-Hyun Jun, Gyoo-Cheol Hwang, Myung-Hee Lee, Bai-Sun Kong. 341-344 [doi]
- A 30% beyond VDD signal swing 9-ENOB pipelined ADC using a 1.2V 30dB loop-gain opampB. Robert Gregoire, Tawfiq Musah, Nima Maghari, Skyler Weaver, Un-Ku Moon. 345-348 [doi]
- A 14-bit 200-MS/s time-interleaved ADC with sample-time error detection and cancelationBei Yu, Chixiao Chen, Yu Zhu, Peng Zhang, Yiwen Zhang, Xiaoshi Zhu, Fan Ye, Junyan Ren. 349-352 [doi]
- A time-domain architecture and design method of high speed A-to-D converters with standard cellsMasao Takayama, Shiro Dosho, Noriaki Takeda, Masaya Miyahara, Akira Matsuzawa. 353-356 [doi]
- A 90nm CMOS, 5.6ps, 0.23pJ/code time-to-digital converter with multipath oscillator and seamless cycle detectionChang-Ming Lai, Meng-Hung Shen, Geng-Yi Pan, Po-Chiun Huang. 357-360 [doi]
- A 0.7mW 13b temperature-stable MASH ΔΣ TDC with delay-line assisted calibrationYing Cao, Paul Leroux, Wouter De Cock, Michiel Steyaert. 361-364 [doi]
- An ultra-low-cost Bluetooth SOC in 0.11-μm CMOSSam Chun-Geik Tan, Fei Song, Renliang Zheng, Jiqing Cui, Guoqin Yao, Litian Tang, Yuejin Yang, Dandan Guo, Alexander Tanzil, Junmin Cao, Ming Kong, KianTiong Wong, Chee-Lee Heng, Osama Shana'a, Guang-Kaai Dehng. 365-368 [doi]
- An energy-efficient super-regenerative ASK receiver with a ΔΣ-based pulse-width demodulatorPo-Yun Hsiao, Yao-Hong Liu, Tsung-Hsien Lin. 369-372 [doi]
- A 60GHz 16Gb/s 16QAM low-power direct-conversion transceiver using capacitive cross-coupling neutralization in 65 nm CMOSHiroki Asada, Keigo Bunsen, Kota Matsushita, Rui Murakami, Qinghong Bu, Ahmed Musa, Takahiro Sato, Tatsuya Yamaguchi, Ryo Minami, Toshihiko Ito, Kenichi Okada, Akira Matsuzawa. 373-376 [doi]
- A low-power digital front-end direct-sampling receiver for flexible radiosRashmi Nanda, Henry Chen, Dejan Markovic. 377-380 [doi]
- A high-band IR-UWB chipset for real-time duty-cycled communication and localization systemsX. Wang, Kathleen Philips, C. Zhou, Ben Busze, Hans W. Pflug, A. Young, Jac Romme, Pieter Harpe, Sumit Bagga, Stefano D'Amico, Marcello De Matteis, Andrea Baschirotto, Harmke de Groot. 381-384 [doi]
- An active guarding technique for substrate noise suppression on LC-tank oscillatorsHao-Ming Chao, Kuei-Ann Wen, Michiel Steyaert. 385-388 [doi]
- An asynchronous mixed-mode neuro-fuzzy controller for energy efficient machine intelligence SoCJinwook Oh, Gyeonghoon Kim, Hoi-Jun Yoo. 389-392 [doi]
- System performance and energy consumption improvement methodology by delay adjustable synchronizerMasanori Kurimoto, Yasuhiko Takahashi, Yuji Fujiwara, Mamoru Sakugawa, Souichi Kobayashi, Hiroyuki Kondo. 393-396 [doi]
- A 92mW real-time traffic sign recognition system with robust light and dark adaptationJunyoung Park, Joonsoo Kwon, Jinwook Oh, Seungjin Lee, Hoi-Jun Yoo. 397-400 [doi]
- Quad Full-HD transform engine for dual-standard low-power video codingRahul Rithe, Chih-Chi Cheng, Anantha Chandrakasan. 401-404 [doi]
- A 172.6mW 43.8GFLOPS energy-efficient scalable eight-core 3D graphics processor for mobile multimedia applicationsChia-Ming Chang, Yu-Jung Chen, Yen-Chang Lu, Chun-Yi Lin, Liang-Gee Chen, Shao-Yi Chien. 405-408 [doi]